Fluorescent lamps have "negative resistance." This means that the operating voltage decreases as power dissipation in the lamp increases. Therefore, ensuring the stability of circuits for driving fluorescent lamps can be difficult. Prior art circuits for driving fluorescent lamps have utilized a phase locked loop for driving a resonant fluorescent lamp circuit at the resonant frequency. FIG. 1 shows such a prior art circuit. Referring to FIG. 1, a voltage source V1 is coupled to a source of a PMOSFET M1. A drain of the PMOSFET M1 is coupled to a drain of an NMOSFET M2 and to a first terminal of a capacitor C1. A source of the NMOSFET M2 is coupled to the ground node. A second terminal of the capacitor C1 is coupled to a first terminal of an inductor L1. A second terminal of the inductor L1 is coupled to a first terminal of a capacitor C2, to a first terminal of a fluorescent lamp LAMP1 and to a first terminal of a resistor R1. A second terminal of the capacitor C2 is coupled to the ground node. A second terminal of the fluorescent lamp LAMP1 is coupled to the ground node. A second terminal of the resistor R1 is coupled to a first terminal of a resistor R2 and to a first input to a phase comparator 100. A second terminal of the resistor R2 is coupled to the ground node.
An output of the phase comparator 100 is coupled to a first terminal of a resistor R3. A second terminal of the resistor R3 is coupled to a first terminal of a capacitor C3 and to an input to an amplifier A1. A second terminal of the capacitor C3 is coupled to the ground node. An output of the amplifier A1 is coupled to an input to a voltage controlled oscillator VCO1. An output of the voltage controlled oscillator VCO1 is coupled to a second input to the phase comparator 100 and to a non-inverting input to a comparator COMP1. An inverting input to the comparator COMP1 is coupled to a voltage source V2. An output of the comparator COMP1 is coupled to a gate of the PMOSFET M1 and to a gate of the NMOSFET M2.
A resonant circuit for driving the fluorescent lamp LAMP1 comprises the capacitor C2 and the inductor L1. The capacitor C1 blocks dc signals from the push-pull transistor pair comprising M1 and M2. A signal representative of the lamp voltage is obtained at a node between the resistors R1 and R2. This signal is approximately a sinusoid and is fed to the phase comparator 100. The output of the phase comparator 100 is filtered by a low pass filter comprising R3 and C3 and amplified as necessary by the amplifier A1. The output of the amplifier A1 is coupled to the input of the voltage controlled oscillator VCO1. The output of the voltage controlled oscillator VCO1 is fed to the phase comparator 100. A phase locked loop comprises the phase comparator 100, the low pass filter R3 and C3, the amplifier A1 and the voltage controlled oscillator. The phase locked loop causes the phase of the output signal of the voltage controlled oscillator VCO1 to match the phase of the signal at the, node between R1 and R2. The frequency of each of the signals input to the phase comparator 100 will equal the resonant frequency of the resonant circuit. The output of the voltage controlled oscillator VCO1 is also fed to a comparator COMP1 for forming a square wave signal at the output of the comparator. The width of the square wave pulses is controllable by the voltage V2. The square wave signal drives the push-pull transistor pair at the resonant frequency. The voltage V1 controls the magnitude of the pulses which drive the resonant circuit.
FIG. 2 shows a timing diagram for the circuit shown in FIG. 1. The square wave signal 200 at the output of the comparator COMP1 is shown in comparison to the sinusoidal lamp signal 201 at the node between R1 and R2. It can be seen from FIG. 2 that the pulses of the signal 200 are centered with respect to time about the zero crossings of the sinusoidal signal 201.
Conventional phase locked loops, such as the one utilized in FIG. 1, take a finite amount of time to lock onto a signal due to the presence of the low pass filter in the feedback loop. Also, phase locking in a conventional phase locked loop is highly non-linear process characterized by chaotic behavior that is generally undesirable due its unpredictable nature.
Therefore, what is needed is a circuit for forming pulses which are centered about a zero crossing of an approximately sinusoidal signal that does not suffer from the disadvantages associated with phase locked loops.